Leadless Device Placement
Leadless Device Placement
Leadless chip carriers, also known as MicroLeadFrames, continue to be a popular package for surface mount applications. QFN and DFN packages offer a variety of benefits including reduced lead inductance, a small footprint, thin profile and low weight. Special consideration must be given in the customer’s design in regard to the board layout and mounting of the package. For enhanced thermal, electrical and board-level performance, the exposed pad on the package must be soldered to the board using a corresponding thermal pad on the board. Also, for proper heat conduction through the board, thermal vias need to be incorporated in the PCB in the thermal pad region. Clearance considerations depend on the application.
Some of the factors that can affect the mounting of the leadless package to the board and the quality of the solder joints are as follows:
- Type of vias
- Board thickness
- Surface finish on the board
- Lead finish on the package
- Type of solder paste used
- Amount of solder paste applied
- Stencil layout
- Reflow profile
